An integrated circuit (IC) is an electronic circuit formed using a semiconductor material, such as Silicon, as a substrate and by adding impurities to form solid-state electronic devices, such as transistors, diodes, capacitors, and resistors. Commonly known as a “chip” or a “package”, an integrated circuit is generally encased in hard plastic, forming a “package”. The components in modern day electronics generally appear to be rectangular black plastic packages with connector pins protruding from the plastic encasement. Often, many such packages are electrically coupled so that the chips therein form an electronic circuit to perform certain functions.
The software tools used for designing ICs produce, manipulate, or otherwise work with the circuit layout and circuit components on very small scales. Some of the components that such a tool may manipulate may only measure tens of nanometer across when formed in Silicon. The designs produced and manipulated using these software tools are complex, often including hundreds of thousands of such components interconnected to form an intended electronic circuitry.
A layout includes shapes that the designer selects and positions to achieve a design objective. The objective is to have the shape—the target shape—appear on the wafer as designed. However, the shapes may not appear exactly as designed when manufactured on the wafer through photolithography. For example, a rectangular shape with sharp corners may appear as a rectangular shape with rounded corners on the wafer.
Once a design layout, also referred to simply as a layout, has been finalized for an IC, the design is converted into a set of masks or reticles. A set of masks or reticles is one or more masks or reticles. During manufacture, a semiconductor wafer is exposed to light or radiation through a mask to form microscopic components of the IC. This process is known as photolithography.
The software tools used for designing ICs produce, manipulate, or otherwise work with the circuit layout and circuit components on very small scales. Some of the components that such a tool may manipulate may only measure tens of nanometer across when formed in Silicon. The designs produced and manipulated using these software tools are complex, often including hundreds of thousands of such components interconnected to form an intended electronic circuitry.
A Field Effect Transistor (FET) is a semiconductor device that has controls the electrical conductivity between a source of electric current (source) and a destination of the electrical current (drain). The FET uses a semiconductor structure called a “gate” to create an electric field, which controls the shape and consequently the electrical conductivity of a channel between the source and the drain. The channel is a charge carrier pathway constructed using a semiconductor material.
Many semiconductor devices are planar, i.e., where the semiconductor structures are fabricated on one plane. A non-planar device is a three-dimensional (3D) device where some of the structures are formed above or below a given plane of fabrication. A vertical transistor is a non-planar device having a thin vertical silicon “fin” inversion channel on top of the substrate allowing the gate to make a point of contact on the left and right sides of the fin. Source/drains (S/D) are formed on the top and bottom of the vertical fin and the current flows in a direction that is nominal to the substrate as opposed to a lateral flow found in planar semiconductor devices. A Vertical Field Effect Transistor (VFET) is a FET formed as a vertical transistor.
An on-chip varactor is a capacitor having a variable capacitance as a function of gate voltage. On-chip varactors are important for system-on-chip (SoC) applications such as a frequency modulator or frequency generator in an analog circuit. In conventional CMOS, varactors are formed using transistors with a gate oxide and a connected source/drain. The gate oxide is need for a high voltage varactor because analog circuits are typically operated at a voltage above the nominal operating voltage of digital circuits.
The illustrative embodiments recognize that in a vertical transistor architecture, it is nontrivial to form high voltage varactors for several reasons. First, a thin fin body results in a high resistance when the varactor is operated in a low capacitance regime. High resistance limits the operation frequency of a varactor. Second, relying on a fin body only to provide capacitance limits the capacitance density of the varactor. Back end of line (BEOL) Metal-insulator-metal (MIM) capacitors cannot be used as varactors because the capacitance of a typical MIM is essentially constant, i.e., not sensitive to operating voltage. The illustrative embodiments recognize a need for forming on-chip varactors along with vertical transistors on a common substrate.